1. Field of the Invention
This invention relates to an electronic circuit, specifically to an electronic circuit having a plurality of oscillators different in oscillation frequency from each other.
2. Description of the Related Art
A conventional microcomputer is provided with a system clock oscillator that generates a clock (system clock or the like) for operations of internal circuits such as a CPU (Central Processing Unit) and a timepiece oscillator that generates a clock for a timepiece. In general, the timepiece oscillator is formed of a quartz oscillator and generates a clock of a low frequency (32 KHz, for example) compared with a frequency of the clock generated by the system clock oscillator.
The microcomputer generally has a plurality of operation modes that differs in processing speed from each other, and has a plurality of system clock oscillators that generates clocks different in speed (frequency), each corresponding to each of the operation modes, respectively. That is, a high speed (high frequency) system clock oscillator is put into operation to generate a high frequency clock in a high speed operation mode, while a low speed (low frequency) system clock oscillator is put into operation to generate a low frequency clock in a low speed operation mode.
When the microcomputer is in operation, one of the system clock oscillators and the timepiece oscillator are in operation simultaneously. When the microcomputer is in a waiting period such as a standby period, on the other hand, all the system clock oscillators are halted while only the timepiece oscillator is in operation. In this case, a power supply impedance of the timepiece oscillator is set to be high so that a power consumption of the microcomputer during the waiting period is suppressed.
This kind of microcomputers is described in Japanese Patent Application Publication Nos. 2002-222024 and H09-034867, for example.
When the power supply impedance of the timepiece oscillator is set to be high, however, there is caused a problem that the timepiece would malfunction since a noise caused from the high frequency system clock oscillator is so large in the high speed operation mode to exert an influence on the clock generated by the timepiece oscillator. When the power supply impedance of the timepiece oscillator is set to be low as a countermeasure against the noise, on the other hand, there is caused another problem that the power consumption of the microcomputer is increased.